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  advanced power n and p-channel enhancement electronics corp. mode power mosfet low gate charge n-ch bv dss 30v fast switching performance r ds(on) 72m surface mount package i d 3.3a rohs compliant & halogen-free p-ch bv dss -30v r ds(on) 150m description i d -2.3a absolute maximum ratings symbol parameter rating units n-channel p-channel v ds drain-source voltage 30 -30 v v gs gate-source voltage + 20 + 20 v i d @t a =25 continuous drain current 3 3.3 -2.3 a i d @t a =70 continuous drain current 3 2.7 -1.8 a i dm pulsed drain current 1 12 -10 a p d @t a =25 total power dissipation 1.136 w t stg storage temperature range -55 to 150 t j operating junction temperature range -55 to 150 thermal data symbol value unit rthj-a maximum thermal resistance, junction-ambient 3 110 /w data and specifications subject to change without notice 201101171 parameter 1 AP2530AGY-HF halogen-free product g2 d2 s2 g1 d1 s1 d1 s1 g1 s2 g2 d2 sot-26 a dvanced power mosfets utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. the sot-26 package is widely used for commercial surface mount applications.
n-ch electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 30 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =3a - - 72 m v gs =4.5v, i d =2a - - 135 m v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1 - 3 v g fs forward transconductance v ds =5v, i d =3a - 4.6 - s i dss drain-source leakage current v ds =24v, v gs =0v - - 1 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge 2 i d =3a - 2.8 4.5 nc q gs gate-source charge v ds =15v - 1.2 - nc q gd gate-drain ("miller") charge v gs =4.5v - 1.4 - nc t d(on) turn-on delay time 2 v ds =15v - 5.5 - ns t r rise time i d =1a - 6.5 - ns t d(off) turn-off delay time r g =3.3 ? -10- ns t f fall time v gs =10v - 2 - ns c iss input capacitance v gs =0v - 200 320 pf c oss output capacitance v ds =15v - 60 - pf c rss reverse transfer capacitance f=1.0mhz - 40 - pf r g gate resistance f=1.0mhz - 1 - source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =0.9a, v gs =0v - - 1.2 v t rr reverse recovery time 2 i s =3a, v gs =0v - 15 - ns q rr reverse recovery charge di/dt=100a/s - 8 - nc 2 AP2530AGY-HF
a p2530agy-hf p-ch electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. unit bv dss drain-source breakdown voltage v gs =0v, i d =-250ua -30 - - v r ds(on) static drain-source on-resistance 2 v gs =-10v, i d =-2a - - 150 m v gs =-4.5v, i d =-1a - - 280 m v gs(th) gate threshold voltage v ds =v gs , i d =-250ua -1 - -3 v g fs forward transconductance v ds =-5v, i d =-2a - 2.9 - s i dss drain-source leakage current v ds =-24v, v gs =0v - - -1 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge 2 i d =-2a - 2.5 4 nc q gs gate-source charge v ds =-15v - 0.8 - nc q gd gate-drain ("miller") charge v gs =-4.5v - 1.2 - nc t d(on) turn-on delay time 2 v ds =-15v - 5.5 - ns t r rise time i d =-1a - 8 - ns t d(off) turn-off delay time r g =3.3 ? -17- ns t f fall time v gs =-10v - 3 - ns c iss input capacitance v gs =0v - 160 260 pf c oss output capacitance v ds =-15v - 60 - pf c rss reverse transfer capacitance f=1.0mhz - 40 - pf r g gate resistance f=1.0mhz - 8 - source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =0.9a, v gs =0v - - 1.2 v t rr reverse recovery time 2 i s =2a, v gs =0v - 16 - ns q rr reverse recovery charge di/dt=100a/s - 9 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.surface mounted on 1 in 2 copper pad of fr4 board, t< 5sec ; 180 /w when mounted on min. copper pad. this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. 3
ap2530agy-h f n-channel 3.3a fig 1. typical output characteristics fig 2. typical output characteristics 3.3 2.68 13.2 1.136 fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 4 0 2 4 6 8 10 12 0123456 v ds , drain-to-source voltage (v) i d , drain current (a) t a =25 o c 10v 7.0v 6.0v 5.0v v g = 4.0v 0 2 4 6 8 10 0123456 v ds , drain-to-source voltage (v) i d , drain current (a) t a = 150 o c 10v 7.0v 6.0v 5.0v v g = 4.0v 0.6 1.0 1.4 1.8 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =3a v g =10v 0 1 2 3 4 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 50 60 70 80 90 100 110 246810 v gs , gate-to-source voltage (v) r ds(on) (m ) i d =2a t a =25 o c 0.0 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) (v) i d =1ma
a p2530agy-h f n-channel fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 5 q v g 4.5v q gs q gd q g charge 0 2 4 6 8 10 012345 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =3a v ds =15v 0 100 200 300 1 5 9 1317212529 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-to-source voltage (v) i d (a) 100us 1ms 10ms 100ms 1s dc t a =25 o c single pulse 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 t , pulse width (s) normalized thermal response (r thja ) 0.02 0.05 0.1 0.2 duty factor=0.5 single pulse p dm duty factor = t/t peak t j = p dm x r thja + t a r thja = 180 /w t t 0.01 t d(on) t r t d(off) t f v ds v gs 10% 90% operation in this area limited by r ds(on)
ap2530agy-h f p-channel fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 6 0 2 4 6 8 0123456 -v ds , drain-to-source voltage (v) -i d , drain current (a) t a = 150 o c -10v -7.0v -6.0v -5.0v v g = -4.0v 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =-2a v g = -10 v 0.0 1.0 2.0 3.0 0.2 0.4 0.6 0.8 1 1.2 1.4 -v sd , source-to-drain voltage (v) -i s (a) t j =25 o c t j =150 o c 0 2 4 6 8 10 0123456 -v ds , drain-to-source voltage (v) -i d , drain current (a) t a =25 o c -10v -7.0v -6.0v -5.0v v g = - 4.0 v 100 120 140 160 180 200 220 246810 -v gs , gate-to-source voltage (v) r ds(on) (m ) i d =-1a t a =25 o c 0.0 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized -v gs(th) (v) i d = -1ma
a p2530agy-h f p-channel fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 7 0 2 4 6 8 10 012345 q g , total gate charge (nc) -v gs , gate to source voltage (v) i d = -2a v ds = -15v 0 80 160 240 320 1 5 9 1317212529 -v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-to-source voltage (v) -i d (a) 100us 1ms 10ms 100ms 1s dc t a =25 o c single pulse q v g -4.5v q gs q gd q g charge 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 t , pulse width (s) normalized thermal response (r thja ) 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse p dm duty factor = t/t peak t j = p dm x r thja + t a r thja = 180 /w t t 0.2 t d(on) t r t d(off) t f v ds v gs 10% 90% operation in this area limited by r ds(on)


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